Co-sputtered Si-Zn-Sn-O thin-film transistors: A simplified approach for high-performance logic circuits

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초록

High-performance Si-Zn-Sn-O (SZTO) thin-film transistors (TFTs) were fabricated via a single-step co-sputtering process using SiO2 and ZTO (65:35) targets. The resulting SZTO TFTs exhibited excellent electrical performance and operational stability, with a high field-effect mobility of 24.6 cm(2)V(-1)s(-1), a low subthreshold swing of 0.202 V/decade, and a minimal threshold voltage shift (less than 1.1 V) under stress. The co-sputtering process facilitated precise control of film composition, enabling high-speed and low-power operation through a simplified single deposition. A series of logic circuits, including inverters, NAND, and NOR gates, were also successfully demonstrated. The proposed approach offers simplified process integration and precise composition control, highlighting the viability of SZTO TFTs for scalable, high-speed, and low-power electronic applications.

키워드

Amorphous oxide semiconductorThin film transistorCo-sputteringLogic circuitSi-Zn-Sn-OSingle-step depositionDUAL-GATESTABILITYINGAZNO
제목
Co-sputtered Si-Zn-Sn-O thin-film transistors: A simplified approach for high-performance logic circuits
저자
Lee, SunjinLee, Sang Yeol
DOI
10.1016/j.mssp.2025.109961
발행일
2025-12
유형
Article
저널명
Materials Science in Semiconductor Processing
200