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RISC32-LP: Low-power FPGA-based IoT Sensor Nodes with Energy Reduction Program Analyzer
- Tan, Beng-Liong;
- Mok, Kai-Ming;
- Chang, Jing-Jing;
- Lee, Wai-Kong;
- Hwang, Seong Oun
WEB OF SCIENCE
12SCOPUS
17초록
Field-Programmable Gate Array (FPGA)-based sensor nodes are popular for their flexible design approach and field reconfigurability. RISC32 is one of the recent Internet of Things (IoT) processors proposed for the development of FPGA-based sensor nodes, and it includes the ability to reconfigure the micro-architecture on the fly in order to reduce dynamic energy consumption. However, such a method does not minimize static energy consumption, which is important in FPGA-based systems. In this work, clock gating and dynamic voltage and frequency scaling are applied to further reduce the energy consumption in RISC32. In the research presented here, we implemented a new software called the Energy Reduction Program Analyser to estimate the parameters that configure a sensor node to achieve minimum energy consumption, targeting the typical IoT application scenario. Experimental results show that the low-power techniques applied in this work (RISC32-LP) can reduce energy consumption by 47%, compared to the standard RISC32 processor. IEEE
키워드
- 제목
- RISC32-LP: Low-power FPGA-based IoT Sensor Nodes with Energy Reduction Program Analyzer
- 저자
- Tan, Beng-Liong; Mok, Kai-Ming; Chang, Jing-Jing; Lee, Wai-Kong; Hwang, Seong Oun
- 발행일
- 2022-03-15
- 유형
- Article
- 권
- 9
- 호
- 6
- 페이지
- 4214 ~ 4228
- 언어
- ENG
- 출판사
- Institute of Electrical and Electronics Engineers Inc.
- 발행국가
- 미국
- 분량
- 15 페이지
- ISSN
- P 2327-4662