Silicon Nanowire Charge Trapping Memory for Energy-Efficient Neuromorphic Computing

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초록

This work highlights the utilization of the floating body effect and charge-trapping/de-trapping phenomenon of a Silicon-nanowire (Si-nanowire) charge-trapping memory for an artificial synapse of neuromorphic computing application. Charge trapping/de-trapping in the nitride layer characterizes the long-term potentiation (LTP)/depression (LTD). The accumulation of holes in the potential well achieves short-term potentiation (STP) and controls the transition from STP to LTP. Also, the transition from STP to LTP is analyzed through gate length scaling and high-? material (Al2O3) for blocking oxide. Furthermore, the conductance values of the device are utilized for system-level simulation. System-level hardware parameters of a convolutional neural network (CNN) for inference applications are evaluated and compared to a static random-access memory (SRAM) device and charge-trapping memory. The results confirm that the Si-nanowire transistor with better gate controllability has a high retention time for LTP states, consumes low power, and archives better accuracy (91.27%). These results make the device suitable for low-power neuromorphic applications.

키워드

Si-nanowiregate all around (GAA)synaptic transistorshort term potentiation (STP)long term potentiation (LTP)long term depression (LTD)neural networkneuromorphic computingSYNAPTIC DEVICE1T DRAM
제목
Silicon Nanowire Charge Trapping Memory for Energy-Efficient Neuromorphic Computing
저자
Ansari, Md. Hasan RazaKannan, Udaya MohananEl-Atab, Nazek
DOI
10.1109/TNANO.2023.3296673
발행일
2023-07
유형
Article
저널명
IEEE Transactions on Nanotechnology
22
페이지
409 ~ 416